Meeting Agenda

Wednesday, May 23, 1996

Location:

DC 1304

Time:

1:30 PM

Chair:

Leith Chan

1. Adoption of the Agenda - additions or deletions

2. Coffee Hour

Coffee hour this week:

Gilles Khouzam

Coffee hour next week:

Any volunteers?

3. Next meeting

Date:

May 29, 1996

Location:

DC 1304

Time:

1:30 PM

Chair:

John Beatty

Technical presentation:

Navid Sadikali

4. Forthcoming

Chairs:

1. Josh Cameron
2. Stewart Chao
3. Wilkin Chau

Tech Presenters:

1. Bala Balakumaran
2. Richard Bartels
3. John Beatty

5. Technical Presentation

Presenter:

Randall Reid

Title:

Learner-Centered Design of Interactive Software

Abstract:

I will briefly explore the ideas behind Learner-Centered Design as the possible future of HCI. As a concrete domain for discussion, my focus will be particularly on Learning Support Systems.

6. General Discussion Items

John M. Kominek

a new video board for jiminy has arrived and will be installed shortly. Also the OS will be replaced with Win NT. This will be a fresh install. Please alert members to retrieve any software and data that they don't want to lose. In the longer term, we've requested motherboard upgrades to Pentium Pros for both jiminy and monstro. Won't know for a while if it will happpen, though.

John M. Kominek

7. Action List

8. Director's Meeting

9. Seminars

CS Colloquium Series
Computer Science Department
University of Waterloo


Tolerating Latency Through Software-Controlled Prefetching


By:     Todd C. Mowry
Of:     Department of Electrical and
        Computer Engineering
        University of Toronto


Date:   Tuesday, May 27, 1996
Time:   4:00 P.M.
Place:  Math & Computer Building, Room 5136


Abstract:

The large latency of memory accesses is an important obstacle to achieving
high processor utilization.  This is true in general because of the
increasing gap between processor and memory speeds, and is particularly
true for large-scale shared-memory multiprocessors.  Software-controlled
data prefetching is a technique for tolerating memory latency by
explicitly executing prefetch instructions to move data close to the
processor before it is actually needed.
.LP
This talk proposes and evaluates new compiler algorithms for inserting
prefetch instructions into code, and investigates the architectural
support necessary in order for prefetching to be effective.  The compiler
algorithms can successfully prefetch both dense-matrix and sparse-matrix
scientific code, and attempt to eliminate the overhead of unnecessary
prefetching through a combination of locality analysis and profiling
feedback.  The algorithms have been implemented in an optimizing compiler,
and results thus far have shown that the speed of some applications can be
improved by as much as a factor of two, both on uniprocessor and
large-scale shared-memory multiprocessor systems.

Biography

Todd C. Mowry is an Assistant Professor in the Department of Electrical
and Computer Engineering at the University of Toronto.  He received his
PhD from Stanford University in 1994, where he was a member of the DASH
multiprocessor and SUIF compiler projects.  He currently leads the
STAMPede project, which is investigating compiler and architectural
support for single-chip multiprocessing.

10. Lab Cleanup (until 2:30 or 5 minutes)